Use __builtin_readcyclecounter
like :
int foo(void) {
int start = __builtin_readcyclecounter();
CODE to be TESTED
int end = __builtin_readcyclecounter();
int diff = end - start
printf(diff);
}
Wednesday, 12 July 2017
Thursday, 6 July 2017
VSX Scalar Convert Signed Integer Doubleword to floating-point format and round to Single-Precision XX2-form (XSCVSXDSP/xscvsxdsp)
xscvsxdsp XT,XB
reset_xflags()
src ← ConvertSDtoDP(VSR[32×BX+B].dword[0])
result ← RoundToSP(RN,src)
VSR[32×TX+T].dword[0] ← ConvertSPtoSP64(result)
VSR[32×TX+T].dword[1] ← 0xUUUU_UUUU_UUUU_UUUU
if(xx_flag) then SetFX(XX)
FPRF ← ClassSP(result)
FR ← inc_flag
FI ← xx_flag
Let XT be the value 32×TX + T.
Let XB be the value 32×BX + B.
Let src be the two’s-complement integer value in
doubleword element 0 of VSR[XB].
src is converted to floating-point format, and rounded
to single-precision using the rounding mode specified
by RN.
The result is placed into doubleword element 0 of
VSR[XT] in double-precision format.
The contents of doubleword element 1 of VSR[XT] are
undefined.
FPRF is set to the class and sign of the result as
represented in single-precision format. FR is set to
indicate if the result was incremented when rounded.
FI is set to indicate the result is inexact.
Special Registers Altered
FPRF FR FI FX XX
Load VSX Scalar as Integer Word Algebrai Indexed X-form (LXSIWAX/lxiwax)
lxsiwax XT,RA,RB
if MSR.VSX=0 then VSX_Unavailable()
EA ← ( (RA=0) ? 0 : GPR[RA] ) + GPR[RB]
VSR[32×TX+T].dword[0] ← EXTS64(MEM(EA,4))
VSR[32×TX+T].dword[1] ← 0xUUUU_UUUU_UUUU_UUUU
Let XT be the value 32×TX + T.
Let EA be the sum of the contents of GPR[RA], or 0 if RA
is equal to 0, and the contents of GPR[RB].
When Big-Endian byte ordering is employed, the
contents of the word in storage at address EA are
placed into load_data in such an order that;
– the contents of the byte in storage at address EA
are placed into byte 0 of load_data,
– the contents of the byte in storage at address EA+1
are placed into byte 1 of load_data,
– the contents of the byte in storage at address EA+2
are placed into byte 2 of load_data, and
– the contents of the byte in storage at address EA+3
are placed into byte 3 of load_data.
When Little-Endian byte ordering is employed, the
contents of the word in storage at address EA are
placed into load_data in such an order that;
– the contents of the byte in storage at address EA
are placed into byte 3 of load_data,
– the contents of the byte in storage at address EA+1
are placed into byte 2 of load_data,
– the contents of the byte in storage at address EA+2
are placed into byte 1 of load_data, and
– the contents of the byte in storage at address EA+3
are placed into byte 0 of load_data.
load_data is sign-extended to a doubleword and
placed in doubleword element 0 of VSR[XT].
The contents of doubleword element 1 of VSR[XT] are
undefined.
Special Registers Altered
None
Wednesday, 14 June 2017
Assembler and Dissassembler
LLVM provides two different representation after generating the hardware instructions. The .s file (assembly representation) and .o file ( the object file). They are just two different "IR". If we want to generate the .o file from .s file, we need to call the assembler (usually /usr/bin/as). If we want to do the opposite, we can use objdump -d (meaning disassemble)
The assembler and disassembler together can be used to modify the assembly and do some testing.
e.g. :
clang a.c -S -O2 -o a.s
do some modifications to the a.s
clang a.s -o a.out (here clang implicitly invoke the assembler to generate exe)
You can also do (equivalent to the above):
assemble:
/usr/bin/as a.s -o a.o
clang a.o -o a.out
To look at the assembly of .o or exe
disassemble:
objdump modified.o-d > modified.out.disassembly
objdump modified.out -d > modified.out.disassembly
Monday, 12 June 2017
How to access global variables and TOC
int a = 2;
int b = 3;
int foo(void) {
printf("a+b=%d",a + b);
return 0;
}
foo: # @foo
.Lfunc_begin0:
.Lfunc_gep0:
addis r2, r12, .TOC.-.Lfunc_gep0@ha
addi r2, r2, .TOC.-.Lfunc_gep0@l
.Lfunc_lep0:
.localentry foo, .Lfunc_lep0-.Lfunc_gep0
# BB#0: # %entry
mflr r0
std r0, 16(r1) # save the link register to 16(r1), i.e stackFrame + 16`
stdu r1, -96(r1) # prolog
addis r3, r2, .LC0@toc@ha
addis r4, r2, .LC1@toc@ha
addis r12, r2, .L.str@toc@ha
ld r3, .LC0@toc@l(r3)
ld r4, .LC1@toc@l(r4)
lwz r3, 0(r3)
lwz r4, 0(r4)
add r3, r4, r3
extsw r4, r3
addi r3, r12, .L.str@toc@l
bl printf
nop # may insert tls depending on the where is the callee definition.
li r3, 0
addi r1, r1, 96 # the reverse of the 3rd instr
ld r0, 16(r1) # load the old link reigster address
mtlr r0 # restore the link register value
blr
.long 0
.quad 0
.Lfunc_end0:
.size foo, .Lfunc_end0-.Lfunc_begin0
Thursday, 1 June 2017
4.3.2 Data Cache Instructions (DCBT/dcbt)
\brief: DCBT is one of the Data Cache instruction used on PowerPC.
The Data Cache instructions control various aspects of
the data cache.
TH field in the dcbt and dcbtst instructions
Described below are the TH field values for the dcbt
and dcbtst instructions. For all TH field values which
are not listed, the hint provided by the instruction is
undefined.
TH=0b00000
If TH=0b00000, the dcbt/dcbtst instruction provides a
hint that the program will probably soon access the
block containing the byte addressed by EA.
TH=0b01000 - 0b01111
The dcbt/dcbtst instructions provide hints regarding a
sequence of accesses to data elements, or indicate the
expected use thereof. Such a sequence is called a
“data stream”, and a dcbt/dcbtst instruction in which
TH is set to one of these values is said to be a “data
stream variant” of dcbt/dcbtst. In the remainder of this
section, “data stream” may be abbreviated to “stream”.
A data stream to which a program may perform Load
accesses is said to be a “load data stream”, and is
described using the data stream variants of the dcbt
instruction. A data stream to which a program may perform
Store accesses is said to be a “store data stream”,
and is described using the data stream variants of the
dcbtst instruction.
When, and how often, effective addresses for a data
stream are translated is implementation-dependent.
Each data element is associated with a unit of storage,
The Data Cache instructions control various aspects of
the data cache.
TH field in the dcbt and dcbtst instructions
Described below are the TH field values for the dcbt
and dcbtst instructions. For all TH field values which
are not listed, the hint provided by the instruction is
undefined.
TH=0b00000
If TH=0b00000, the dcbt/dcbtst instruction provides a
hint that the program will probably soon access the
block containing the byte addressed by EA.
TH=0b01000 - 0b01111
The dcbt/dcbtst instructions provide hints regarding a
sequence of accesses to data elements, or indicate the
expected use thereof. Such a sequence is called a
“data stream”, and a dcbt/dcbtst instruction in which
TH is set to one of these values is said to be a “data
stream variant” of dcbt/dcbtst. In the remainder of this
section, “data stream” may be abbreviated to “stream”.
A data stream to which a program may perform Load
accesses is said to be a “load data stream”, and is
described using the data stream variants of the dcbt
instruction. A data stream to which a program may perform
Store accesses is said to be a “store data stream”,
and is described using the data stream variants of the
dcbtst instruction.
When, and how often, effective addresses for a data
stream are translated is implementation-dependent.
Each data element is associated with a unit of storage,
Wednesday, 31 May 2017
How to create a new user as root?
If you are signed in as the root user, you can create a new user at any time by typing:
adduser newuser
If you are signed in as a non-root user who has been given sudo privileges, as demonstrated in the initial server setup guide, you can add a new user by typing:
sudo adduser newuser
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