Branching registers
Branches in PowerPC make use of three special-purpose registers: the condition register, the count register, and the link register.The condition register
The condition register consists conceptually of seven fields. A field is a segment of four bits used to store status information about the results of an instruction. Two of the fields are somewhat special-purpose, and will be covered shortly, and the remaining fields are available for general use. The fields are namedcr0
through cr7
.The first field,
cr0
is used for the results of
fixed-point computation instructions, which use non-immediate operands
(with a few exceptions). The result of the computation is compared
with zero, and the appropriate bits are set (negative, zero, or
positive). To indicate in a computational instruction that you want it to set
cr0
, you simply add a period (.
)
to the end of the instruction. For example, add 4, 5,
6
adds register 5 to register 6 and stores the result in
register 4, without setting any status bits in cr0
.
However, add. 4, 5, 6
does the same thing, but sets
the bits in cr0
based on the computed value.
cr0
is also the default field for use on compare instructions.
The second field (called
cr1
) is used by floating-point
instructions using the period after the instruction name. Floating-point computation is outside the scope of this article.
Each field has four bits. The usage of those bits varies with the instruction being used. Here are their possible uses (floating-point uses are listed but not described):
Condition register field bits
Bit | Mnemonic | Fixed-point comparison | Fixed-point computation | Floating-point comparison | Floating-point computation |
---|---|---|---|---|---|
0 | lt | Less than | Negative | Less than | Exception summary |
1 | gt | Greater than | positive | Greater than | Enabled exception summary |
2 | eq | Equal | Zero | Equal | Invalid operation exception summary |
3 | so | Summary overflow | Summary overflow | Unordered | Overflow exception |
The condition register can be loaded to or from a general-purpose register using
mtcr
, mtcrf
, and mfcr
. mtcr
moves a specified general-purpose register to the condition register. mfcr
moves the condition register to a general-purpose register. mtcrf
loads the condition register from a general-purpose register, but only
the fields specified by an 8-bit mask, which is the first operand.
Here are some examples:
Listing 1. Condition register transfer examples
#Copy register 4 to the condition register mtcr 4 #Copy the condition register to register 28 mfcr 28 #Copy fields 0, 1, 2, and 7 from register 18 to the condition register mtcrf 0b11100001, 18
The count and link registers
The link register (calledLR
) is a special-purpose register
that holds return addresses from branch instructions. All branch instructions can be
told to set the link register, which, if the branch is taken, sets the link register to
the address of the instruction immediately following the current instruction. Branch
instructions set the link register by appending the letter l
to the end of the instruction. For instance, b
is an
unconditional branch instruction, and bl
is an unconditional
branch instruction that sets the link register.
The count register (called
CTR
) is a special-purpose
register designed to hold loop counters. Special branch instructions
can decrement the count register and/or conditionally branch depending
on whether CTR
has reached zero.
Both the link and count registers can be used as a branch destination.
bctr
branches to the address specified in the count register, and blr
branches to the address specified in the link register (like the return statement in C language level). The link and count registers can also be loaded and copied from general-purpose registers. For the link register,
mtlr
moves a given register value to the link register, and mflr
moves a value from the link register to a general-purpose register. mtctr
and mfctr
do the same for the count register.
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