Basics of conditional branching (c)

There are several different ways to specify the extended mnemonics. The way we will concentrate on combines the instruction name and the instruction's BO operand (specifying the mode). The simplest ones are bt and bf. bt branches if the given bit of the condition register is true, and bf branches if the given bit of the condition register is false. In addition, the condition register bit can be specified with mnemonics as well. If you specify 4*cr3+eq this will test bit 2 of cr3 (the 4* is there because each field is four bits wide). The available mnemonics for each bit of the bit fields were given earlier in the description of the condition register. If you only specify the bit without specifying the field, the instruction will default to cr0.
Here are some examples:

Listing 5. Simple conditional branches

#Branch if the equal bit of cr0 is set
bt eq, where_i_want_to_go

#Branch if the equal bit of cr1 is not set
bf 4*cr1+eq, where_i_want_to_go

#Branch if the negative bit (mnemonic is "lt") of cr5 is set
bt 4*cr5+lt, where_i_want_to_go

Another set of extended mnemonics combines the instruction, the BO operand, and the condition bit (but not the field). These use what are more-or-less "traditional" mnemonics for various kinds of common conditional branches. For example, bne my_destination (branch if not equal to my_destination) is equivalent to bf eq, my_destination (branch if the eq bit is false to my_destination). To use a different condition register field with this set of mnemonics, simply specify the field in the operand before the target address, such as bne cr4, my_destination. These are the branch mnemonics following this pattern: blt (less than), ble (less than or equal), beq (equal), bge (greater than or equal), bgt (greater than), bnl (not less than), bne (not equal), bng (not greater than), bso (summary overflow), bns (not summary overflow), bun (unordered - floating point specific), and bnu (not unordered - floating-point specific).
All of the mnemonics and extended mnemonics can have l and/or a affixed to them to enable the link register or absolute addressing, respectively.
Using the extended mnemonics allows a much more readable and writable programming style. For the more advanced conditional branches, the extended mnemonics are more than just helpful, they are essential.

Additional condition register features

Because the condition register has multiple fields, different computations and comparisons can use different fields, and then logical operations can be used to combine the conditions together. All of the logical operations have the following form: cr<opname> target_bit, operand_bit_1, operand_bit_2. For example, to do a logical and on the eq bit of cr2 and the lt bit of cr7, and have it stored in the eq bit of cr0, you would write: crand 4*cr0+eq, 4*cr2+eq, 4*cr7+lt.
You can move around condition register fields using mcrf. To copy cr4 to cr1 you would write mcrf cr1, cr4.
The branch instructions can also give hints to the branch processor for branch prediction. On most conditional branch instructions, appending a + to the instruction will signal to the branch processor that this branch will probably be taken. Appending a - to the instruction will signal that this branch will probably not be taken. However, this is usually not necessary, as the branch processor in the POWER5 CPU is usually able to do branch prediction quite well.