subfc or sf (Subtract from Carrying) instruction

  Version 6.1  Version 7.2  Version 7.1 

Purpose

Subtracts the contents of a general-purpose register from the contents of another general-purpose register and places the result in a third general-purpose register.

Syntax

Bits	Value
0 - 5	31
6 - 10	RT
11 - 15	RA
16 - 20	RB
21	OE
22 - 30	8
31	Rc

PowerPC®
subfc	RT, RA, RB
subfc.	RT, RA, RB
subfco	RT, RA, RB
subfco.	RT, RA, RB

POWER® family
sf	RT, RA, RB
sf.	RT, RA, RB
sfo	RT, RA, RB
sfo.	RT, RA, RB

See Extended Mnemonics of Fixed-Point Arithmetic Instructions for more information.

Description

The subfc and sf instructions add the ones complement of the contents of general-purpose register (GPR) RA and 1 to the contents of GPR RB and stores the result in the target GPR RT.

The subfc instruction has four syntax forms. Each syntax form has a different effect on Condition Register Field 0 and the Fixed-Point Exception Register.

The sf instruction has four syntax forms. Each syntax form has a different effect on Condition Register Field 0 and the Fixed-Point Exception Register.

Item	Description
Syntax Form	Overflow Exception (OE)	Fixed-Point Exception Register	Record Bit (Rc)	Condition Register Field 0
subfc	0	CA	0	None
subfc.	0	CA	1	LT,GT,EQ,SO
subfco	1	SO,OV,CA	0	None
subfco.	1	SO,OV,CA	1	LT,GT,EQ,SO
sf	0	CA	0	None
sf.	0	CA	1	LT,GT,EQ,SO
sfo	1	SO,OV,CA	0	None
sfo.	1	SO,OV,CA	1	LT,GT,EQ,SO

The four syntax forms of the subfc instruction, and the four syntax forms of the sf instruction, always affect the Carry bit (CA) in the Fixed-Point Exception Register. If the syntax form sets the Overflow Exception (OE) bit to 1, the instruction affects the Summary Overflow (SO) and Overflow (OV) bits in the Fixed-Point Exception Register. If the syntax form sets the Record (Rc) bit to 1, the instruction affects the Less Than (LT) zero, Greater Than (GT) zero, Equal To (EQ) zero, and Summary Overflow (SO) bits in Condition Register Field 0.

Parameters

Item	Description
RT	Specifies target general-purpose register where result of operation is stored.
RA	Specifies source general-purpose register for operation.
RB	Specifies source general-purpose register for operation.

Examples

1. The following code subtracts the contents of GPR 4 from the contents of GPR 10, stores the result in GPR 6, and sets the Carry bit to reflect the result of the operation:

   # Assume GPR 4 contains 0x8000 7000.
   # Assume GPR 10 contains 0x9000 3000.
   subfc 6,4,10
   # GPR 6 now contains 0x0FFF C000.

2. The following code subtracts the contents of GPR 4 from the contents of GPR 10, stores the result in GPR 6, and sets Condition Register Field 0 and the Carry bit to reflect the result of the operation:

   # Assume GPR 4 contains 0x0000 4500.
   # Assume GPR 10 contains 0x8000 7000.
   subfc. 6,4,10
   # GPR 6 now contains 0x8000 2B00.

3. The following code subtracts the contents of GPR 4 from the contents of GPR 10, stores the result in GPR 6, and sets the Summary Overflow, Overflow, and Carry bits in the Fixed-Point Exception Register to reflect the result of the operation:

   # Assume GPR 4 contains 0x8000 0000.
   # Assume GPR 10 contains 0x0000 4500.
   subfco 6,4,10
   # GPR 6 now contains 0x8000 4500.

4. The following code subtracts the contents of GPR 4 from the contents of GPR 10, stores the result in GPR 6, and sets the Summary Overflow, Overflow, and Carry bits in the Fixed-Point Exception Register and Condition Register Field 0 to reflect the result of the operation:

   # Assume GPR 4 contains 0x8000 0000.
   # Assume GPR 10 contains 0x0000 7000.
   subfco. 6,4,10
   # GPR 6 now contains 0x8000 7000.